The Chips Joint Undertaking (Chips JU) is supporting the development of European AI chip demonstrators that can move advanced chip designs closer to integration into real European compute infrastructure.

The call is the first stream under the AI Chips and Systems for EU Compute Infrastructure initiative and focuses on bringing cutting-edge European AI chip designs to the demonstrator stage, with functional silicon hardware integrated with system partners and prepared for infrastructure-level evaluation.

Funding Available

Indicative EU budget: €10 million
Expected EU contribution: approximately €1 million per project

The call is implemented as a Simple Grant (SG) under the Digital Europe Programme and is co-funded with National Funding Authorities.

What the Call Supports

Projects should deliver functional PCB-level AI chip demonstrators and support their integration and validation.

Activities can include:

• Completion and integration of the AI chip demonstrator
• PCB development and integration
• Cooling and interconnect solutions
• Software integration and system bring-up
• Benchmarking and performance preparation
• Validation on a common EU evaluation platform

Selected demonstrators will undergo performance-based assessment, with the strongest solutions potentially receiving the AI Compute Excellence Label and qualifying for a later stage of full rack development.

Expected Outcomes

The call aims to deliver:

• Functional AI chip prototypes designed by European fabless companies
• Working demonstrators physically integrated with system partners
• Comparative performance evidence through a common European evaluation platform
• A shortlist of European AI chip solutions demonstrating potential for integration into EU compute infrastructure
• A pathway towards future rack-level development and deployment

Eligible Organisations

The call is particularly relevant to organisations across the European AI compute ecosystem, including:

• EU-established AI chip design companies / fabless semiconductor companies
• System integration companies
• Original Equipment Manufacturers (OEMs)
• Other relevant technology and infrastructure partners supporting AI chip integration, software bring-up and benchmarking

Each proposal must include at least one EU-established AI chip design company responsible for the AI chip design and associated intellectual property.

Technology Requirements

Applicants must demonstrate that the AI chip has been taped out at a commercial foundry, with engineering samples available or expected within the required timeframe.

A PCB hosting the chip must also be in production or expected during the development phase.

Development and Validation

The demonstrator development phase is expected to cover approximately six months, after which the systems can undergo up to two months of performance-based assessment on the common evaluation platform.

Participation Restrictions

The call is subject to ownership and control restrictions designed to protect European digital infrastructure, communication and information systems, and related supply chains.

Where applicable, participants must submit an Ownership Control Declaration as a mandatory annex.

Application Requirements

Applications must be submitted as a one-stage Full Project Proposal (FPP) through the EU Funding & Tenders Portal.

Mandatory documentation includes:

• Application Form Part A
• Application Form Part B
• Ownership Control Declaration, where applicable
• National Budget Table
• Other required annexes and supporting documents

All consortium participants must be registered in the EU Participant Register and have a Participant Identification Code (PIC).

Important Dates

Opening date: 7 July 2026
Original deadline: 23 September 2026
Extended deadline: 27 October 2026, 17:00 Brussels time

Geographic Scope

European Union

The call specifically requires participation of an EU-established AI chip design company, with country-specific national funding rules applying.

Important Applicant Information

The call is focused on functional AI chip hardware rather than early-stage chip concepts alone. Applicants should therefore be able to demonstrate substantial technical maturity, including tape-out and a credible pathway to engineering samples and PCB-level integration.

For non-technical questions, applicants can contact Calls@chips-ju.europa.eu.

Click HERE to visit the official website.